- 您现在的位置：买卖IC网 > Sheet目录319 > COP8SG-EPU (National Semiconductor)BOARD PROTOTYPE/TARGET COP8
USART
(Continued)
RCVG: This bit is set high whenever a framing error occurs
and goes low when RDX goes high. Read only, cleared on
CHL1, CHL0: These bits select the character frame format.
Parity is not included and is generated/verified by hardware.
Read/Write, cleared on reset.
CHL1 = 0, CHL0 = 0 The frame contains eight data bits.
reset.
ENUI-USART Interrupt and Clock Source Register
(Address at 0BC)
CHL1 = 0, CHL0 = 1
The frame contains seven data
STP2
STP78
ETDX
SSEL XRCLK XTCLK
ERI
ETI
bits.
Bit 7
Bit 0
CHL1 = 1, CHL0 = 0 The frame contains nine data bits.
CHL1 = 1, CHL0 = 1 Loopback Mode selected. Trans-
mitter output internally looped back
to receiver input. Nine bit framing
format is used.
ERR: This bit is a global USART error flag which gets set if
any or a combination of the errors (DOE, FE, PE) occur.
Read only; it cannot be written by software, cleared on reset.
RBFL: This bit is set when the USART has received a com-
plete character and has copied it into the RBUF register. It is
automatically reset when software reads the character from
RBUF. Read only; it cannot be written by software, cleared
on reset.
TBMT: This bit is set when the USART transfers a byte of
data from the TBUF register into the TSFT register for trans-
mission. It is automatically reset when software writes into
the TBUF register. Read only, bit is set to “one” on reset; it
cannot be written by software.
ENUR-USART Receive Control and Status Register
(Address at 0BB)
STP2: This bit programs the number of Stop bits to be trans-
mitted. Read/Write, cleared on reset.
STP2 = 0 One Stop bit transmitted.
STP2 = 1 Two Stop bits transmitted.
STP78: This bit is set to program the last Stop bit to be 7/8th
of a bit in length. Read/Write, cleared on reset.
ETDX: TDX (USART Transmit Pin) is the alternate function
assigned to Port L pin L2; it is selected by setting ETDX bit.
To simulate line break generation, software should reset
ETDX bit and output logic zero to TDX pin through Port L
data and configuration registers. Read/Write, cleared on re-
set.
SSEL: USART mode select. Read/Write, cleared on reset.
SSEL = 0 Asynchronous Mode.
SSEL = 1 Synchronous Mode.
XRCLK: This bit selects the clock source for the receiver
section. Read/Write, cleared on reset.
XRCLK = 0 The clock source is selected through the
PSR and BAUD registers.
XRCLK = 1 Signal on CKX (L1) pin is used as the clock.
DOE
FE
PE
Reserved
RBIT9
ATTN
XMTG
RCVG
XTCLK: This bit selects the clock source for the transmitter
(Note 12)
section. Read/Write, cleared on reset.
Bit 7
Bit 0
XTCLK = 0 The clock source is selected through the
Note 12: Bit is reserved for future use. User must set to zero.
DOE: Flags a Data Overrun Error. Read only, cleared on
read, cleared on reset.
DOE = 0 Indicates no Data Overrun Error has been de-
tected since the last time the ENUR register
was read.
DOE = 1 Indicates the occurrence of a Data Overrun Er-
ror.
FE: Flags a Framing Error. Read only, cleared on read,
cleared on reset.
FE = 0 Indicates no Framing Error has been detected
since the last time the ENUR register was read.
FE = 1 Indicates the occurrence of a Framing Error.
PE: Flags a Parity Error. Read only, cleared on read, cleared
on reset.
PE = 0 Indicates no Parity Error has been detected since
the last time the ENUR register was read.
PE = 1 Indicates the occurrence of a Parity Error.
SPARE: Reserved for future use. Read/Write, cleared on re-
set.
RBIT9: Contains the ninth data bit received when the US-
ART is operating with nine data bits per frame. Read only,
cleared on reset.
ATTN: ATTENTION Mode is enabled while this bit is set.
This bit is cleared automatically on receiving a character with
data bit nine set. Read/Write, cleared on reset.
XMTG: This bit is set to indicate that the USART is transmit-
ting. It gets reset at the end of the last frame (end of last Stop
bit). Read only, cleared on reset.
www.national.com
26
PSR and BAUD registers.
XTCLK = 1 Signal on CKX (L1) pin is used as the clock.
ERI: This bit enables/disables interrupt from the receiver
section. Read/Write, cleared on reset.
ERI = 0 Interrupt from the receiver is disabled.
ERI = 1 Interrupt from the receiver is enabled.
ETI: This bit enables/disables interrupt from the transmitter
section. Read/Write, cleared on reset.
ETI = 0 Interrupt from the transmitter is disabled.
ETI = 1 Interrupt from the transmitter is enabled.
Associated I/O Pins
Data is transmitted on the TDX pin and received on the RDX
pin. TDX is the alternate function assigned to Port L pin L2;
it is selected by setting ETDX (in the ENUI register) to one.
RDX is an inherent function of Port L pin L3, requiring no
setup.
The baud rate clock for the USART can be generated
on-chip, or can be taken from an external source. Port L pin
L1 (CKX) is the external clock I/O pin. The CKX pin can be
either an input or an output, as determined by Port L Con-
figuration and Data registers (Bit 1). As an input, it accepts a
clock signal which may be selected to drive the transmitter
and/or receiver. As an output, it presents the internal Baud
Rate Generator output.
发布紧急采购，3分钟左右您将得到回复。
相关PDF资料
CORE1553-DEV-KIT
KIT DEVELOPMENT FOR IP CORE1553
CP131-AG
LNR PWR SUP 5V 8A, +/-12V 1.7A
CPC1590P
MOSFET GATE DVR ISO 8-FLATPACK
CPC5002G
ISOLAT DGTL 3.75KVRMS 2CH 8-DIP
CPCI-D-3U-300C
PWR SUPLY DC/DC CPCI 300W 3UX8HP
CPD250-4530G
PWR SUP 250W 3.3/5/12/-12V QUAD
CS4161YN8
IC DRIVER H-BRDG DUAL 85MA 8DIP
CS5461A-ISZ
IC ENERGY METERING 1PHASE 24SSOP
相关代理商/技术参数
COP8SGR728M7
功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
COP8SGR728M7/NOPB
功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
COP8SGR728M8
功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
COP8SGR728M8/NOPB
功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
COP8SGR728N8
功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
COP8SGR728N8/NOPB
功能描述:8位微控制器 -MCU RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
COP8SGR740N8
功能描述:IC MCU 8BIT CMOS OTP 40DIP RoHS:否 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:COP8™ 8SG 其它有关文件:STM32F101T8 View All Specifications 特色产品:STM32 32-bit Cortex MCUs 标准包装:490 系列:STM32 F1 核心处理器:ARM? Cortex?-M3 芯体尺寸:32-位 速度:36MHz 连通性:I²C，IrDA，LIN，SPI，UART/USART 外围设备:DMA，PDR，POR，PVD，PWM，温度传感器，WDT 输入/输出数:26 程序存储器容量:64KB（64K x 8） 程序存储器类型:闪存 EEPROM 大小:- RAM 容量:10K x 8 电压 - 电源 (Vcc/Vdd):2 V ~ 3.6 V 数据转换器:A/D 10x12b 振荡器型:内部 工作温度:-40°C ~ 85°C 封装/外壳:36-VFQFN，36-VFQFPN 包装:托盘 配用:497-10030-ND - STARTER KIT FOR STM32497-8853-ND - BOARD DEMO STM32 UNIV USB-UUSCIKSDKSTM32-PL-ND - KIT IAR KICKSTART STM32 CORTEXM3497-8512-ND - KIT STARTER FOR STM32F10XE MCU497-8505-ND - KIT STARTER FOR STM32F10XE MCU497-8304-ND - KIT STM32 MOTOR DRIVER BLDC497-6438-ND - BOARD EVALUTION FOR STM32 512K497-6289-ND - KIT PERFORMANCE STICK FOR STM32MCBSTM32UME-ND - BOARD EVAL MCBSTM32 + ULINK-MEMCBSTM32U-ND - BOARD EVAL MCBSTM32 + ULINK2更多... 其它名称:497-9032STM32F101T8U6-ND
COP8SGR740N8/NOPB
制造商:Texas Instruments 功能描述: